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Double Pulse Testing

What is a double pulse test?

A double pulse test is a way of checking the time domain behavior of a half bridge power module (transistors and associated circuitry).

In this test the transistor is loaded with current for a very short period. This allows losses, energy and other parameters to be measured without building heat. The temperature can be considered as a control variable.

If desired, heat can be added with a hot plate or climate/environmental chamber to simulate different operating conditions.

Standard “Low Side” Double Pulse Test

It is called the low-side Double Pulse Test (LS-DPT) because the device under test is the low-side switch of the half bridge.

Why this is often used:

  • The low-side device is referenced close to ground/DC-, so VGS is much easier to drive and measure.
  • VDS​ measurement is also easier because the common-mode stress is lower than for a high-side device.
  • Current can still be built up in the inductor and then switched through the DUT in a way that is representative of real converter operation.
  • It gives a practical, repeatable way to extract Eon​, Eoff​, switching times, overshoot, ringing, and di/dt/dv/dt.
  • Because it is easier to implement and compare across labs, it became the reference setup used in many datasheets, app notes, and test benches.

Step 1 of the LS-DPT

The low side transistor is turned on, this allows zero current parameters such as stored energy to be measured. The transistor is used to charge a large inductor with current. The inductor is usually air-cored to avoid saturation.

Fig. 1A: Equivalent current path for the first pulse in a standard low-side Double Pulse Test.

Fig. 1A: Equivalent current path for the first pulse in a standard low-side Double Pulse Test.

Fig. 1B: Idealized waveform response during the first pulse of a standard low-side Double Pulse Test.

Fig. 1B: Idealized waveform response during the first pulse of a standard low-side Double Pulse Test.

Step 2 of the LS-DPT

The transistor is turned off this allows Turn-off parameters such as Eoff to be measured; the current circulates in the inductor.

Fig. 2A: Equivalent current path during low-side turn-off, showing inductor current commutation into the upper freewheeling path.

Fig. 2A: Equivalent current path during low-side turn-off, showing inductor current commutation into the upper freewheeling path.

Fig. 2B: Idealized waveform response during step 2 of the standard low-side Double Pulse Test.

Fig. 2B: Idealized waveform response during step 2 of the standard low-side Double Pulse Test.

Step 3 of the LS-DPT

The transistor is turned on again. This allows turn on parameters such as Eon to be measured. The inductor acts like a current source (similar to many real loads).

Steps 2 and 3 can be repeated to measure different currents (Multiple pulses). Be careful as heat may start to build. Typically, <5 pulses are used.

Fig. 3A: Equivalent current path during step 3 of the low-side DPT, with the low-side device turning on against the inductor current source.

Fig. 3A: Equivalent current path during step 3 of the low-side DPT, with the low-side device turning on against the inductor current source.

Fig. 3B: Idealized waveform response during step 3 of the standard low-side Double Pulse Test.

Fig. 3B: Idealized waveform response during step 3 of the standard low-side Double Pulse Test.

Step 4 of the LS-DPT

The transistor is turned off to complete the test and stop the current from rising. The current in the inductor will slowly decay due to resistive and body diode losses.
Again, Turn-Off parameters such as Eoff can be measured.

Fig. 4A: Equivalent current path during step 4 of the low-side DPT, with the inductor current commutated into the upper freewheeling path and beginning to decay.

Fig. 4A: Equivalent current path during step 4 of the low-side DPT, with the inductor current commutated into the upper freewheeling path and beginning to decay.

Fig. 4B: Idealized waveform response during step 4 of the standard low-side Double Pulse Test.

Fig. 4B: Idealized waveform response during step 4 of the standard low-side Double Pulse Test.

Real Waveform of the LS-DPT

Below is a real waveform from a “Triple Pulse Test” of GaN. Measured On an IWATSU DS-8000 Series Oscilloscope with PMK Probes.

Fig. 5: Measured multiple-pulse low-side DPT waveforms for ID, VGS, and VDS

Fig. 5: Measured multiple-pulse low-side DPT waveforms for ID, VGS, and VDS

Required Equipment

  • Half bridge to be tested
  • Load inductor (should not saturate at maximum test current)
  • Power supply for DC-link voltage
  • Power supply for half-bridge gate drive and auxiliary circuits
  • Double pulse generator, e.g. Cleverscope CS548 pulse generator, programmed microcontroller, specialist gate driver.
  • High quality, high accuracy oscilloscope with deskew, math functions (derivative, multiply, integrate) or DPT Utility. – E.g. IWATSU DS8000 or Cleverscope CS548
  • High voltage oscilloscope probe for VDS – e.g. Firefly, PHVX, PHV2000, Firefly, Bumblebee
  • Low voltage oscilloscope probe for VGS – e.g. Firefly, MMCX probe, PML, HSDP.
  • High Bandwidth current measurement probe – e.g. UFCS, IWATSU Rogowski, OPECS.
  • Appropriate safety chamber

High voltage oscilloscope probes for VDS (selection)

Choosing the right high-voltage probe depends on the required voltage range, bandwidth, common-mode rejection, and measurement environment. Optically-isolated probes are ideal for the most demanding switching measurements, offering outstanding common-mode immunity and galvanic isolation. High-voltage differential probes provide a practical and versatile solution for many general-purpose floating measurements. High-voltage passive probes are a straightforward option for high-voltage measurements where simplicity, bandwidth, and probe handling are key priorities.

Optically-Isolated Probes

FireFly® >1.5GHz, >180dB CMRR, ±60kV​

High Voltage Differential Probes

BumbleBee® Series, up to 500MHz, up to ±2000V

HORNET® Series, >300MHz, ±4000V

High Voltage Passive Probes

PHVX Series, 4kV rms, > 600 MHz

PHV Series, 4kV, 400MHz

Low voltage oscilloscope probes for VGS (selection)

Selecting the right low-voltage probe for VGSmeasurement depends mainly on bandwidth, probe loading, reference conditions, and the required voltage range. Optically isolated probes provide outstanding common-mode immunity for fast switching environments. Single-ended and differential probes offer very high bandwidth for accurate gate-drive characterization close to the device. Fast low-voltage passive probes are a practical choice where low input capacitance, simple handling, and clean probing technique are essential.

Optically-Isolated Probes

FireFly® >1.5GHz, >180dB CMRR, ±60kV​

Single-ended and differential probes

Single-Ended: MMCX Probe Series >1GHz, 60V

Differential: HSDP Series, >4GHz, up to ±42V, up to 7.5m

Fast Low Voltage Passive Probes

PML Low-Z Series, 1.5 GHz, 30 VDC

High Bandwidth current measurement probes (selection)

Current measurement in double pulse testing requires the right balance of bandwidth, invasiveness, dynamic range, and physical accessibility. Ultra-fast current shunts provide the highest signal fidelity for capturing very fast switching currents with minimal insertion inductance. Rogowski coils offer flexible, non-intrusive current measurement for larger conductors and high di/dt events. Optical electric current sensors provide galvanically isolated current measurement with excellent immunity to high common-mode transients.

Ultra-Fast Current Shunt UFCS

UFCS: >1GHz B/W, <200 pH Insertion Inductance, various sizes

Connect to UFCS for highest signal fidelity: FireFly®

Connect SMA Attenuator between FireFly® and UFCS for increased safety and voltages: 3dB, 6bB, 10dB, 20dB

Rogowski Coil Current Probes

IWATSU® Rogowski Coil Series

Optical Electric Current Sensor OpECS

OpECS - Optical Electric Current Sensor - 150 MHz, >140 A, no derating

Bandwidth Considerations

  • Sufficient bandwidth is required to accurately measure the switching edge.
  • A common recommendation is: recommended bandwidth in Hz > 1.75 / trise.
  • Consider bandwidth flatness. Some probes may offer high nominal bandwidth but still show frequency-response deviations that can introduce overshoot in the measured signal.
  • More bandwidth means more noise.
  • Oscilloscope software bandwidth limiting can be used to reduce noise.
  • A practical approach is to reduce the oscilloscope bandwidth until you first observe a visible change in the waveform.
Fig. 6: Effect of oscilloscope bandwidth on the measured response to a very fast step input, showing how lower bandwidth increasingly smooths the edge and alters overshoot and ringing.

Fig. 6: Effect of oscilloscope bandwidth on the measured response to a very fast step input, showing how lower bandwidth increasingly smooths the edge and alters overshoot and ringing.

Test point considerations

  • Make your test points as close as possible to the transistor being measured to reduce ringing and overshoot in the measurement.
  • PMK offers a variety of test point adapters to suit different applications. Please get in touch with your requirements, as the range is continuously expanding to address new use cases.
  • Our broad selection of clips and small solder-in adapters can be used to connect directly to the component, or where adding a dedicated test point is not possible.
  • Coaxial connections are recommended wherever possible to achieve high CMRR and bandwidth. MMCX and BNC are common test point formats.
  • Square-pin connectors can also be used where greater convenience is preferred.
  • Direct-to-probe coaxial connectors are recommended for the highest bandwidth and for high-voltage applications.
Fig. 7: various types of test point connections

Fig. 7: various types of test point connections

Common mode considerations

  • High side: the probe must be either differential or isolated, for example BumbleBee, Hornet, FireFly, or HSDP.
  • For high-side gate measurements, CMRR is especially important. In practice, an isolated probe such as FireFly is the most suitable choice here.
  • Low side: it may be surprising, but common-mode effects can still be a significant issue.
  • Ensure that all grounded probes and power supplies share a common ground.
  • The common-mode voltage seen by a differential probe can also be reduced by using this common ground reference.
  • Ground bounce can occur due to the common-mode capacitance of isolated power supplies, especially when using a high-voltage DC link.
  • For measuring small voltages, such as across shunts, it is recommended to add a choke, for example the UFCS-Choke.
  • Ferrite kits can also be added to passive probes to improve CMRR.

Common-mode challenge in high-side gate measurements

In a high-side gate measurement, the switch node can move over a very large voltage range relative to ground, while the actual gate-to-source voltage to be measured remains small. For example, the high-side source may sit at a reference potential of 1000 V, while the desired gate drive is only 20 V. In that case, the probe must accurately resolve a small differential signal on top of a very large common-mode voltage swing.

This makes CMRR (common-mode rejection ratio) one of the most important probe parameters for high-side VGS measurements. If CMRR is insufficient, common-mode voltage is converted into measurement error, which can severely distort the displayed gate waveform.

  • The switch node voltage can swing between the DC-link voltage and low-side ground.
  • The actual measurement of interest, VGS, may only be a few volts or a few tens of volts.
  • A large common-mode voltage swing combined with limited CMRR can create substantial error, especially at higher frequencies.
  • For this reason, standard high-voltage differential probes may become unsuitable for demanding high-side gate measurements.
  • Optically isolated probes with very high CMRR are generally the preferred solution for accurate high-side VGS characterization.

In short: high-side gate measurements are not defined only by voltage range or bandwidth. They are defined by the ability to measure a small gate signal in the presence of a large, fast-moving common-mode voltage. The higher the CMRR and the better the isolation, the more trustworthy the measurement.

Fig. 8A: High side gate driver and reference, and low side gate driver and reference

Fig. 8A: High side gate driver and reference, and low side gate driver and reference

Fig. 8B: High side reference voltage

Fig. 8B: High side reference voltage

Example Test Setup (40 V GaN)

Below example shows an overview of the test setup and probes used:

  • Signal acquisition: IWATSU DS8000 oscilloscope
  • VGS measurement: PMK MMCX-P0725 passive probe
  • ID current measurement: PMK's UFCS-R024 current shunt, connected to a PMK FireFly via an attenuator and SMA to MMCX adapter. The FireFly has a dedicated 50 Ohm terminated 1V tip for this setup.
  • VDS measurement: PMK 4kV PHVX hands-free passive probe
  • Board: Cleverscope CS1097 GaN DPD
  • Double pulse generation: Cleverscope CS548 pulse generator
  • Test platform: PMK Skid
Fig. 9: Example test setup (40V GaN)

Fig. 9: Example test setup (40V GaN)

Analysis - Oscilloscope

Manual analysis of the switching waveform parameters can be performed using oscilloscope math functions. However, the IWATSU DS-8000 Oscilloscope with DS-821 software application has a large range of configurable, automatic, switching measurement and reporting functions.

Pro tip: 𝐸_𝑜𝑛 and 𝐸_𝑜𝑓𝑓 are Energies and not losses - these parameters also include stored charges. At any given current 𝐸_𝑜𝑛+𝐸_𝑜𝑓𝑓=𝑠𝑤𝑖𝑡𝑐ℎ𝑖𝑛𝑔 𝑙𝑜𝑠𝑠 : the stored charge terms cancel.

Fig. 10: results showing Eon = 46 μJ at 168A (left side), and Eoff = 31 μJ at 181A (right side)

Fig. 10: results showing Eon = 46 μJ at 168A (left side), and Eoff = 31 μJ at 181A (right side)

Analysis - typical result (example)

By repeating the measurement a different test currents, we can create data-sheet information for the power device and learn more about its operation.

Analysis - typical result (example)

By repeating the measurement a different test currents, we can create data-sheet information for the power device and learn more about its operation.

Fig. 11A: Example Switching Energy Comparison – 400 V High-Speed SiC Module

Fig. 11A: Example Switching Energy Comparison – 400 V High-Speed SiC Module

Fig. 11B: Turn-Off Voltage Rise Time – 400 VHigh-Speed Sic Module

Fig. 11B: Turn-Off Voltage Rise Time – 400 VHigh-Speed Sic Module

Typical Waveform - Zero Current Turn On

Below we can see a typical zero current (initial) turn-on waveform for a GaN double pulse test.

Fig. 12: typicalzero current (initial) turn-on waveform for a GaN double pulse test

Fig. 12: typicalzero current (initial) turn-on waveform for a GaN double pulse test

Typical Waveform - Turn On

Below we can see a typical turn-on waveform for a GaN double pulse test.

Fig. 13: typical turn-on waveform for a GaN double pulse test

Fig. 13: typical turn-on waveform for a GaN double pulse test

Typical Waveform - Turn Off

Below we can see a typical turn-off waveform for a GaN double pulse test.

Fig. 14: a typical turn-off waveform for a GaN double pulse test

Fig. 14: a typical turn-off waveform for a GaN double pulse test

Interesting Phenomena and Debugging: Unusual Turn Off

At high current we can see a tail current on this device. GaN does not have a tail current? Is this a measurement error?

Take a closer look at VGS ......

Fig. 15: unusual turn off waveform showing tail current on GaN device

Fig. 15: unusual turn off waveform showing tail current on GaN device

Interesting Phenomena and Debugging: Explanation

This can be explained as follows:

  1. When the current falls there is an inductive voltage spike and ringing on Vds and therefore also Vdg.
  2. This causes a current to flow through Cgd raising the gate voltage (Vgs).
  3. The Vgs rise crosses the threshold voltage, causing the transistor to turn back on.
  4. This causes a tail current and increase in switching losses.

If the probes had overshoot or ringing this effect would be hidden. With our accurate probes and attention to test-point placement we can see this issue and investigate it further.

Fig. 16: graphical explanation of phenomena causing tail current

Fig. 16: graphical explanation of phenomena causing tail current

Need help with your Double Pulse Test setup?

Send us an email: sales@pmkamerica.com

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